7 Commits

Author	SHA1	Message	Date
Pol Henarejos	bfc82d5de4	Reset must be confirmed always. ... Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>	2022-09-23 18:07:05 +02:00
Pol Henarejos	cd66e65b9c	Adding ENABLE_POWER_RESET to enable power cycle for reset command. Enabled by default. ... Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>	2022-09-23 16:46:16 +02:00
Pol Henarejos	2d496fd8fc	Random functions shall be called for each core, otherwise it will hung. ... Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>	2022-09-22 20:18:05 +02:00
Pol Henarejos	d95bc1aba6	Reset shall call for user presence and can only be called within the 10 seconds from boot. ... Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>	2022-09-22 19:25:04 +02:00
Pol Henarejos	a3c60f762d	Reorganizing core0/core1 split. ... Now CBOR and APDU (i.e., intensive processing) areas are executed on core1, while core0 is dedicated for hardware tasks (usb, button, led, etc.).	2022-09-20 14:39:59 +02:00
Pol Henarejos	24f48e33bb	Reset nows flushes the memory storage. ... Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>	2022-09-19 17:20:00 +02:00
Pol Henarejos	3873303309	Refactor CTAP2 file structure. ... Signed-off-by: Pol Henarejos <pol.henarejos@cttc.es>	2022-09-15 14:16:12 +02:00