Merge commit 'd803bfe2b1fe7f5e219e50ac20d6801a0a58ac75' as 'vendor/ruvector'

vendor/ruvector/examples/ultra-low-latency-sim/Cargo.toml

@@ -0,0 +1,41 @@
+[workspace]
+
+[package]
+name = "ultra-low-latency-sim"
+version = "0.1.0"
+edition = "2021"
+description = "Meta-simulation achieving quadrillion simulations/second on CPU with SIMD"
+license = "MIT"
+
+[dependencies]
+rayon = "1.10"
+rand = "0.8"
+rand_xoshiro = "0.6"
+ed25519-dalek = { version = "2.1", features = ["rand_core"] }
+sha2 = "0.10"
+hex = "0.4"
+
+[target.'cfg(target_arch = "aarch64")'.dependencies]
+# ARM NEON is always available on aarch64
+
+[target.'cfg(target_arch = "x86_64")'.dependencies]
+# AVX2/AVX-512 detected at runtime
+
+[profile.release]
+opt-level = 3
+lto = "fat"
+codegen-units = 1
+panic = "abort"
+
+[profile.bench]
+inherits = "release"
+debug = true
+
+[[bin]]
+name = "quadrillion-sim"
+path = "src/main.rs"
+
+# Benchmarks can be added later
+# [[bench]]
+# name = "meta_simulation"
+# harness = false