879 lines
35 KiB
Markdown
879 lines
35 KiB
Markdown
# ADR-002: RuvLLM Integration with Ruvector
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**Status:** Proposed
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**Date:** 2026-01-18
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**Decision Makers:** Ruvector Architecture Team
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**Technical Area:** LLM Serving Runtime / Vector Memory Integration
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---
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## Context and Problem Statement
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RuvLLM is an edge-focused LLM serving runtime designed for portable, high-performance inference across heterogeneous hardware. Built with Rust, SIMD optimizations, and WASM support, RuvLLM aims to deliver sub-millisecond orchestration latency while enabling continuous self-improvement through the SONA (Self-Optimizing Neural Architecture) framework.
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The integration with Ruvector provides RuvLLM with intelligent memory capabilities, transforming it from a static inference engine into a learning system that improves with every interaction.
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### Current State
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RuvLLM currently implements:
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- **LFM2 Cortex**: Frozen reasoning engine (135M-2.6B parameters)
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- **FastGRNN Router**: Intelligent model selection with sparse + low-rank matrices
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- **Graph Attention Engine**: Multi-head attention with edge features
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- **SONA Learning Loops**: Three-tier temporal learning (instant/hourly/weekly)
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- **SIMD Inference**: Native AVX2/AVX512/SSE4.1 operations
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- **Q4 Quantization**: 4-bit weight quantization for memory efficiency
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### Key Challenges
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1. **Memory Pressure**: Edge devices have limited RAM; KV cache and LoRA adapters compete for resources
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2. **Cache Coherency**: Long context sessions require efficient KV cache management with quantization fallback
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3. **Learning Without Forgetting**: SONA needs persistent pattern storage that survives restarts
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4. **Audit and Debugging**: Production systems require semantic search over execution logs
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5. **Cross-Session Learning**: Federated agents need to share learned patterns efficiently
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---
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## Decision Drivers
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### Performance Requirements
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- **Orchestration latency**: <1ms end-to-end (embedding + retrieval + routing)
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- **KV cache lookup**: <100us for session state recovery
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- **Pattern search**: <2ms for HNSW-indexed policy retrieval
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- **Memory footprint**: Support 50MB base + variable cache tiers
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### Scalability Requirements
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- **Concurrent sessions**: 1000+ active sessions with KV cache
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- **Pattern capacity**: 100K+ learned patterns in ReasoningBank
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- **Witness logs**: Retention of 7+ days of audit data
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- **Federated sync**: Efficient pattern transfer between edge nodes
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### Portability Requirements
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- **WASM support**: Full functionality in browser/edge environments
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- **No native dependencies**: sql.js for SQLite, pure-Rust HNSW
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- **Platform agnostic**: x86_64, ARM64, WASM32 targets
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---
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## Considered Options
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### Option A: Separate Memory Systems
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Maintain independent storage for each concern:
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- Redis for session state
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- PostgreSQL for audit logs
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- Custom file format for learned patterns
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**Pros:**
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- Specialized tools for each concern
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- Familiar operational patterns
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**Cons:**
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- Multiple systems to manage
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- No unified semantic search
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- Complex deployment on edge devices
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- No cross-concern intelligence
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### Option B: Ruvector as Unified Memory Layer
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Use Ruvector's vector database with HNSW indexing, graph storage, and metadata capabilities as the single memory substrate for all RuvLLM concerns.
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**Pros:**
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- Single deployment artifact
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- Unified vector search across all data types
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- Graph relationships between sessions, patterns, and logs
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- WASM-compatible for edge deployment
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- Self-learning hooks enable continuous improvement
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**Cons:**
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- Ruvector must support all access patterns efficiently
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- Custom encoding for some data types
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- Learning curve for operators
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### Option C: Tiered Memory with Ruvector Core
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Ruvector handles hot/warm data; external cold storage for archives.
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**Pros:**
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- Best of both worlds
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- Cost-effective long-term storage
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**Cons:**
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- Additional complexity for tiering logic
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- Two systems to manage
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---
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## Decision Outcome
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**Chosen Option: Option B - Ruvector as Unified Memory Layer**
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Ruvector provides a cohesive memory substrate that aligns with RuvLLM's edge-first philosophy. The unified HNSW index enables semantic search across policies, sessions, and logs while the graph layer captures relationships between these entities.
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### Rationale
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1. **Single binary deployment**: Edge devices benefit from one runtime
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2. **Semantic unification**: All data becomes searchable by meaning
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3. **Graph intelligence**: Relationships between patterns and sessions drive routing
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4. **WASM portability**: Both RuvLLM and Ruvector target WASM
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5. **SONA alignment**: Three-tier learning maps naturally to Ruvector's architecture
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---
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## Technical Specifications
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### Ruvector Integration Roles
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Ruvector serves three distinct but interconnected roles in the RuvLLM architecture:
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```
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+-----------------------------------------------------------------------+
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| RUVECTOR INTEGRATION ARCHITECTURE |
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+-----------------------------------------------------------------------+
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| +-------------------+ +-------------------+ +--------------+ |
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| | POLICY MEMORY | | SESSION STATE | | WITNESS LOG | |
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| | STORE | | INDEX | | INDEX | |
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| | | | | | | |
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| | - Quantization | | - KV cache keys | | - Routing | |
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| | thresholds | | - Adapter refs | | decisions | |
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| | - Router weights | | - Cache locality | | - Quality | |
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| | - EWC++ Fisher | | - Session graphs | | scores | |
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| | - Pattern bank | | - Conversation | | - Latency | |
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| | | | history | | traces | |
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| +--------+----------+ +---------+---------+ +------+-------+ |
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| | | | |
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| +-------------+------------+----------+-----------+ |
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| | | |
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| v v |
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| +-----------+------------+ +-------+--------+ |
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| | HNSW INDEX LAYER | | GRAPH STORE | |
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| | (Unified Search) | | (Relations) | |
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| +------------------------+ +----------------+ |
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+-----------------------------------------------------------------------+
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```
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#### Role A: Policy Memory Store
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Stores learned thresholds and parameters that inform runtime decisions.
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**Data Schema:**
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```rust
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/// Policy entry stored in Ruvector
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struct PolicyEntry {
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/// Unique identifier
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id: Uuid,
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/// Policy type: "quantization", "router", "ewc", "pattern"
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policy_type: String,
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/// Embedding vector for semantic search (768-D)
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embedding: Vec<f32>,
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/// Policy parameters as JSON
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parameters: serde_json::Value,
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/// Confidence score from learning
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confidence: f32,
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/// Fisher information (for EWC++ policies)
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fisher_diagonal: Option<Vec<f32>>,
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/// Creation timestamp
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created_at: DateTime<Utc>,
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/// Last accessed (for LRU eviction)
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last_accessed: DateTime<Utc>,
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/// Source: "instant_loop", "background_loop", "deep_loop", "federated"
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source: String,
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}
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/// Quantization threshold policy
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struct QuantizationPolicy {
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/// Layer indices affected
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layer_range: (usize, usize),
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/// Precision: "fp16", "q8", "q4_k", "q4_0"
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precision: String,
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/// Activation threshold triggering this precision
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activation_threshold: f32,
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/// Memory budget constraint (bytes)
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memory_budget: usize,
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/// Learned quality-latency tradeoff
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quality_weight: f32,
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}
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/// Router weight policy
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struct RouterPolicy {
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/// FastGRNN cell parameters
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cell_weights: FastGRNNWeights,
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/// Output head biases
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head_biases: RouterHeadBiases,
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/// EWC regularization strength
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ewc_lambda: f32,
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/// Training loss at checkpoint
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training_loss: f32,
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}
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```
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**Access Patterns:**
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- **Write**: After background/deep learning loops complete
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- **Read**: On every inference request (cached locally with TTL)
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- **Search**: By policy type + semantic similarity to current context
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#### Role B: Session State Index
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Manages multi-turn conversation state including KV cache references and adapter selection.
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**Data Schema:**
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```rust
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/// Session state entry
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struct SessionState {
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/// Session identifier
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session_id: String,
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/// User/tenant identifier
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user_id: Option<String>,
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/// Embedding of conversation context (768-D)
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context_embedding: Vec<f32>,
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/// Reference to KV cache location
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kv_cache_ref: KvCacheReference,
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/// Currently active LoRA adapter ID
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active_adapter: Option<String>,
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/// Conversation turn count
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turn_count: u32,
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/// Last activity timestamp
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last_active: DateTime<Utc>,
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/// Session metadata
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metadata: HashMap<String, serde_json::Value>,
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}
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/// KV cache reference with tiered storage
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struct KvCacheReference {
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/// Cache storage tier: "hot", "warm", "cold"
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tier: CacheTier,
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/// Location identifier
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location: CacheLocation,
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/// Number of cached tokens
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cached_tokens: usize,
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/// Quantization level of cached KV pairs
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quantization: CacheQuantization,
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/// Cache creation timestamp
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created_at: DateTime<Utc>,
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}
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/// Two-tier KV cache configuration
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enum CacheQuantization {
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/// High-precision tail (last N tokens) - FP16
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HighPrecisionTail {
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tail_length: usize,
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precision: String,
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},
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/// Quantized store (older tokens) - Q4/Q8
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QuantizedStore {
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precision: String,
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compression_ratio: f32,
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},
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/// Hybrid: tail in FP16, rest in Q4
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Hybrid {
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tail_length: usize,
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tail_precision: String,
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store_precision: String,
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},
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}
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```
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**Access Patterns:**
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- **Write**: On session creation, after each turn, on adapter switch
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- **Read**: On every request (session recovery)
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- **Search**: By user_id, by context similarity, by adapter requirements
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- **Expire**: Background task evicts stale sessions
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#### Role C: Witness Log Index
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Enables postmortem analysis and audit queries over execution history.
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**Data Schema:**
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```rust
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/// Execution witness log entry
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struct WitnessEntry {
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/// Unique request identifier
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request_id: Uuid,
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/// Associated session ID
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session_id: String,
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/// Query embedding for semantic search (768-D)
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query_embedding: Vec<f32>,
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/// Routing decision made
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routing_decision: RoutingDecision,
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/// Model used for generation
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model_used: ModelSize,
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/// Quality score (0.0 - 1.0) from evaluation
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quality_score: f32,
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/// End-to-end latency breakdown
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latency: LatencyBreakdown,
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/// Context documents retrieved
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context_doc_ids: Vec<Uuid>,
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/// Response embedding for clustering
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response_embedding: Vec<f32>,
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/// Timestamp
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timestamp: DateTime<Utc>,
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/// Error details if failed
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error: Option<ErrorInfo>,
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}
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/// Latency breakdown for profiling
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struct LatencyBreakdown {
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/// Embedding generation time
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embedding_ms: f32,
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/// HNSW retrieval time
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retrieval_ms: f32,
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/// Router decision time
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routing_ms: f32,
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/// Graph attention time
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attention_ms: f32,
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/// LLM generation time
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generation_ms: f32,
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/// Total end-to-end time
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total_ms: f32,
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}
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/// Routing decision record
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struct RoutingDecision {
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/// Selected model
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model: ModelSize,
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/// Context size bucket
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context_size: usize,
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/// Temperature used
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temperature: f32,
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/// Top-p used
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top_p: f32,
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/// Router confidence
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confidence: f32,
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/// Model probability distribution
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model_probs: [f32; 4],
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}
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```
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**Access Patterns:**
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- **Write**: Async after every request completion
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- **Read**: On-demand for debugging, analytics dashboards
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- **Search**: By time range, by quality threshold, by semantic similarity
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- **Aggregate**: Quality trends, latency percentiles, model usage stats
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---
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### Data Flow Architecture
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#### Vector Flow: Embeddings to Ruvector
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```
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+-----------------------------------------------------------------------+
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| VECTOR DATA FLOW |
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+-----------------------------------------------------------------------+
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| User Query |
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| +-------------------+ |
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| | LFM2 Embedder | (768-D embedding, ~50ms) |
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| | - Tokenize | |
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| | - Encode | |
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| | - Project | |
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| | - Normalize | |
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| +--------+----------+ |
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| +--------+----------+ +-------------------+ |
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| | Query Embedding |---->| RUVECTOR HNSW | |
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| | (768-D vector) | | - M=32, ef=64 | |
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| +-------------------+ | - Cosine dist | |
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| +---------+---------+ |
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| +--------------+-----------+-----------+ |
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| v v v |
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| +--------+-------+ +----+--------+ +-------+------+ |
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| | Policy Search | | Session | | Context | |
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| | (quantization, | | Recovery | | Retrieval | |
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| | routing) | | (KV cache) | | (documents) | |
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| +----------------+ +-------------+ +--------------+ |
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+-----------------------------------------------------------------------+
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```
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#### Scheduling Decision Flow: Ruvector Informs Routing
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```
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+-----------------------------------------------------------------------+
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| SCHEDULING DECISION FLOW |
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+-----------------------------------------------------------------------+
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| Query Features (128-D) |
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| +----> Length, complexity, domain signals |
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| v |
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| +-------------------+ |
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| | POLICY LOOKUP | Search Ruvector for relevant policies |
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| +--------+----------+ |
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| v |
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| +-------------------+ +-------------------+ |
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| | Retrieved | | Historical | |
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| | - Quant policy | | - Success rate | |
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| | - Router weights | | per model | |
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| | - EWC constraints | | - Avg latency | |
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| +--------+----------+ +---------+---------+ |
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| +------------+-------------+ |
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| v |
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| +---------------------+------------------+ |
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| | FASTGRNN ROUTER | |
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| | Inputs: | |
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| | - Query features (128-D) | |
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| | - Policy parameters | |
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| | - Historical performance | |
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| | Outputs: | |
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| | - Model selection (350M/700M/1.2B/ | |
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| | 2.6B) | |
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| | - Context size bucket | |
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| | - Temperature, top-p | |
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| | - Confidence score | |
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| +--------------------+-------------------+ |
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| v |
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| +--------------------+-------------------+ |
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| | KV CACHE MANAGEMENT | |
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| | Two-Tier Architecture: | |
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| | +----------------+ +---------------+ | |
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| | | High-Precision | | Quantized | | |
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| | | Tail (FP16) | | Store (Q4/Q8) | | |
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| | | Last N tokens | | Older tokens | | |
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| | +----------------+ +---------------+ | |
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| | Decision factors from Ruvector: | |
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| | - Session importance score | |
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| | - Memory pressure signals | |
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| | - Quality requirements | |
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| +----------------------------------------+ |
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+-----------------------------------------------------------------------+
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```
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#### Audit Log Indexing Flow
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```
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+-----------------------------------------------------------------------+
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| AUDIT LOG INDEXING |
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+-----------------------------------------------------------------------+
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| Request Completion |
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| v |
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| +-------------------+ |
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| | WITNESS BUILDER | Construct audit entry |
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| | - Query embedding | |
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| | - Response embed | |
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| | - Routing record | |
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| | - Latency trace | |
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| | - Quality score | |
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| +--------+----------+ |
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| v (async, non-blocking) |
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| +-------------------+ |
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| | WRITEBACK QUEUE | Batch writes for efficiency |
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| | - Max batch: 100 | |
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| | - Max wait: 1s | |
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| +--------+----------+ |
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| v |
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| +-------------------+ +-------------------+ |
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| | RUVECTOR INSERT | | GRAPH EDGES | |
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| | - HNSW index | | - Session links | |
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| | - Metadata store | | - Similar queries | |
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| +-------------------+ +-------------------+ |
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| Query Patterns: |
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| +-------------------+ |
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| | POSTMORTEM SEARCH | |
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| | - "Find requests | |
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| | with quality | |
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| | < 0.5" | |
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| | - "Similar errors | |
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| | to this one" | |
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| | - "Latency spikes | |
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| | in last hour" | |
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| +-------------------+ |
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+-----------------------------------------------------------------------+
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```
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---
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### Paged Attention Mechanism (mistral.rs-inspired)
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RuvLLM implements a paged attention system inspired by mistral.rs for efficient KV cache management:
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```rust
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/// Paged attention configuration
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struct PagedAttentionConfig {
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/// Page size in tokens
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page_size: usize, // Default: 16 tokens
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/// Maximum pages per sequence
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max_pages: usize,
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/// Page table size
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page_table_capacity: usize,
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/// Block allocator strategy
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allocation_strategy: AllocationStrategy,
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}
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/// Two-tier KV cache implementation
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struct TwoTierKvCache {
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/// High-precision tail: most recent tokens in FP16
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/// Critical for attention quality on recent context
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high_precision_tail: PagedCache<f16>,
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/// Quantized store: older tokens in Q4/Q8
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/// Compressed for memory efficiency
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quantized_store: PagedCache<QuantizedKv>,
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/// Boundary position between tiers
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tier_boundary: AtomicUsize,
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/// Policy reference from Ruvector
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quantization_policy: Arc<RwLock<QuantizationPolicy>>,
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}
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impl TwoTierKvCache {
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/// Append new KV pairs, managing tier transitions
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fn append(&mut self, keys: &[f16], values: &[f16]) {
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// Add to high-precision tail
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self.high_precision_tail.append(keys, values);
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// Check if tail exceeds threshold
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if self.high_precision_tail.len() > self.policy().tail_threshold {
|
|
// Migrate oldest tokens to quantized store
|
|
let to_migrate = self.high_precision_tail.pop_oldest(MIGRATION_BATCH);
|
|
let quantized = self.quantize_kv_pairs(&to_migrate);
|
|
self.quantized_store.append(&quantized);
|
|
}
|
|
}
|
|
|
|
/// Attention computation with tier-aware access
|
|
fn attend(&self, query: &[f16], mask: &AttentionMask) -> Vec<f16> {
|
|
// Compute attention over both tiers
|
|
let tail_attn = self.high_precision_tail.attend(query, mask);
|
|
let store_attn = self.quantized_store.attend_quantized(query, mask);
|
|
|
|
// Weighted combination based on position decay
|
|
combine_attention(tail_attn, store_attn, &self.position_weights())
|
|
}
|
|
}
|
|
```
|
|
|
|
---
|
|
|
|
### Unified Memory Pool Architecture
|
|
|
|
A single memory pool manages both KV cache and LoRA adapters to prevent fragmentation:
|
|
|
|
```rust
|
|
/// Unified memory pool for KV cache and LoRA adapters
|
|
struct UnifiedMemoryPool {
|
|
/// Total memory budget
|
|
total_budget: usize,
|
|
|
|
/// Allocations by type
|
|
allocations: DashMap<AllocationId, Allocation>,
|
|
|
|
/// Priority queue for eviction
|
|
eviction_queue: Mutex<BinaryHeap<EvictionCandidate>>,
|
|
|
|
/// Ruvector connection for persistence policies
|
|
ruvector: Arc<RuvectorMemory>,
|
|
}
|
|
|
|
/// Allocation types sharing the pool
|
|
enum AllocationType {
|
|
/// KV cache pages
|
|
KvCache {
|
|
session_id: String,
|
|
tier: CacheTier,
|
|
page_count: usize,
|
|
},
|
|
/// LoRA adapter weights
|
|
LoraAdapter {
|
|
adapter_id: String,
|
|
rank: usize,
|
|
layer_count: usize,
|
|
},
|
|
/// FastGRNN router weights
|
|
RouterWeights {
|
|
version: u64,
|
|
},
|
|
}
|
|
|
|
impl UnifiedMemoryPool {
|
|
/// Allocate memory, evicting if necessary
|
|
fn allocate(&self, request: AllocationRequest) -> Result<AllocationId> {
|
|
let required = request.size_bytes();
|
|
|
|
// Check available memory
|
|
while self.available() < required {
|
|
// Evict lowest priority allocation
|
|
let victim = self.eviction_queue.lock().pop()
|
|
.ok_or(Error::OutOfMemory)?;
|
|
|
|
// Persist to Ruvector before eviction
|
|
self.persist_to_ruvector(&victim)?;
|
|
|
|
self.free(victim.allocation_id);
|
|
}
|
|
|
|
// Allocate and track
|
|
let id = self.do_allocate(request)?;
|
|
self.update_eviction_priority(&id);
|
|
|
|
Ok(id)
|
|
}
|
|
|
|
/// Persist allocation to Ruvector for recovery
|
|
fn persist_to_ruvector(&self, alloc: &Allocation) -> Result<()> {
|
|
match &alloc.allocation_type {
|
|
AllocationType::KvCache { session_id, .. } => {
|
|
// Store KV cache reference for later recovery
|
|
self.ruvector.store_session_cache_ref(session_id, alloc)?;
|
|
}
|
|
AllocationType::LoraAdapter { adapter_id, .. } => {
|
|
// Store adapter checkpoint
|
|
self.ruvector.store_adapter_checkpoint(adapter_id, alloc)?;
|
|
}
|
|
_ => {}
|
|
}
|
|
Ok(())
|
|
}
|
|
}
|
|
```
|
|
|
|
---
|
|
|
|
### WASM Kernel Packs
|
|
|
|
Pluggable optimization kernels delivered as WASM modules:
|
|
|
|
```rust
|
|
/// WASM kernel pack interface
|
|
trait WasmKernelPack: Send + Sync {
|
|
/// Kernel identification
|
|
fn id(&self) -> &str;
|
|
fn version(&self) -> &str;
|
|
|
|
/// Capability declarations
|
|
fn capabilities(&self) -> KernelCapabilities;
|
|
|
|
/// Execute kernel
|
|
fn execute(&self, inputs: &KernelInputs) -> Result<KernelOutputs>;
|
|
}
|
|
|
|
/// Available kernel types
|
|
enum KernelType {
|
|
/// Attention computation kernel
|
|
Attention {
|
|
variant: AttentionVariant, // Standard, Flash, PagedFlash
|
|
precision: Precision, // FP16, Q8, Q4
|
|
},
|
|
/// Matrix multiplication kernel
|
|
MatMul {
|
|
variant: MatMulVariant, // Standard, Tiled, Strassen
|
|
precision: Precision,
|
|
},
|
|
/// Quantization kernel
|
|
Quantize {
|
|
from_precision: Precision,
|
|
to_precision: Precision,
|
|
method: QuantMethod, // RTN, GPTQ, AWQ
|
|
},
|
|
/// Embedding kernel
|
|
Embed {
|
|
method: EmbedMethod, // Lookup, Fused
|
|
},
|
|
}
|
|
|
|
/// Kernel pack registry with Ruvector-backed discovery
|
|
struct KernelRegistry {
|
|
/// Loaded kernels
|
|
kernels: DashMap<String, Box<dyn WasmKernelPack>>,
|
|
|
|
/// Ruvector for kernel metadata and selection history
|
|
ruvector: Arc<RuvectorMemory>,
|
|
|
|
/// Runtime selection based on hardware
|
|
selector: KernelSelector,
|
|
}
|
|
|
|
impl KernelRegistry {
|
|
/// Select optimal kernel for operation
|
|
fn select(&self, operation: &Operation) -> Result<&dyn WasmKernelPack> {
|
|
// Check Ruvector for learned preferences
|
|
let history = self.ruvector.search_kernel_performance(operation)?;
|
|
|
|
// Select based on historical performance + capabilities
|
|
let kernel_id = self.selector.select(operation, &history)?;
|
|
|
|
self.kernels.get(&kernel_id)
|
|
.map(|k| k.value().as_ref())
|
|
.ok_or(Error::KernelNotFound)
|
|
}
|
|
|
|
/// Record kernel performance for learning
|
|
fn record_performance(&self, kernel_id: &str, metrics: KernelMetrics) -> Result<()> {
|
|
self.ruvector.store_kernel_performance(kernel_id, metrics)
|
|
}
|
|
}
|
|
```
|
|
|
|
---
|
|
|
|
### Integration with SONA Learning Loops
|
|
|
|
Ruvector enables SONA's three-tier temporal learning:
|
|
|
|
```
|
|
+-----------------------------------------------------------------------+
|
|
| SONA + RUVECTOR INTEGRATION |
|
|
+-----------------------------------------------------------------------+
|
|
| |
|
|
| LOOP A: INSTANT (Per-Request, <1ms) |
|
|
| +-------------------------------------------------------------------+|
|
|
| | 1. Record trajectory to ring buffer (in-memory) ||
|
|
| | 2. Update edge weights in Ruvector graph (+/- 5%) ||
|
|
| | 3. MicroLoRA adjustment (rank 1-2, top-k params) ||
|
|
| | 4. Async write witness entry to Ruvector ||
|
|
| +-------------------------------------------------------------------+|
|
|
| |
|
|
| LOOP B: BACKGROUND (Hourly, 10 seconds) |
|
|
| +-------------------------------------------------------------------+|
|
|
| | 1. Query Ruvector for recent high-quality trajectories ||
|
|
| | 2. Train router on accumulated data ||
|
|
| | 3. Compute Fisher Information for EWC++ ||
|
|
| | 4. Update LoRA base matrices (rank 4-8) ||
|
|
| | 5. Store new policy entries in Ruvector ||
|
|
| | 6. Checkpoint router weights to Ruvector ||
|
|
| +-------------------------------------------------------------------+|
|
|
| |
|
|
| LOOP C: DEEP (Weekly, 10 minutes) |
|
|
| +-------------------------------------------------------------------+|
|
|
| | 1. Full consolidation: Query all patterns from Ruvector ||
|
|
| | 2. K-means++ clustering to extract pattern bank ||
|
|
| | 3. Memory compression: Prune redundant nodes ||
|
|
| | 4. Archive old witness logs to cold storage ||
|
|
| | 5. Cross-session knowledge transfer via graph traversal ||
|
|
| | 6. Store consolidated patterns back to Ruvector ||
|
|
| +-------------------------------------------------------------------+|
|
|
| |
|
|
+-----------------------------------------------------------------------+
|
|
```
|
|
|
|
---
|
|
|
|
## Consequences
|
|
|
|
### Positive Consequences
|
|
|
|
1. **Unified semantic search**: All data types (policies, sessions, logs) searchable by meaning
|
|
2. **Portable deployment**: Single binary with Ruvector embedded works on edge devices
|
|
3. **Continuous improvement**: SONA loops have persistent storage for learning
|
|
4. **Debugging capability**: Semantic audit logs enable intelligent postmortem analysis
|
|
5. **Memory efficiency**: Unified pool prevents fragmentation; tiered KV cache reduces pressure
|
|
6. **Federated learning**: Ruvector facilitates pattern sharing between nodes
|
|
|
|
### Negative Consequences
|
|
|
|
1. **Ruvector dependency**: Core functionality tied to Ruvector's capabilities
|
|
2. **Storage overhead**: Vector embeddings add space requirements (~3KB per entry)
|
|
3. **Complexity**: Three integration roles require careful schema design
|
|
4. **Cold start**: Initial requests lack learned policies until training accumulates
|
|
|
|
### Mitigation Strategies
|
|
|
|
| Risk | Mitigation |
|
|
|------|------------|
|
|
| Ruvector dependency | Design clean abstraction layer; fallback to simple LRU cache |
|
|
| Storage overhead | Aggressive compression for cold data; time-based expiration |
|
|
| Schema complexity | Strong typing with Rust structs; comprehensive validation |
|
|
| Cold start | Bundle sensible default policies; warm cache from federated network |
|
|
|
|
---
|
|
|
|
## Related Decisions
|
|
|
|
- **ADR-001**: Ruvector Core Architecture (HNSW, Graph Store)
|
|
- **ADR-003**: SIMD Optimization Strategy
|
|
- **ADR-004**: KV Cache Management
|
|
- **ADR-005**: WASM Runtime Integration
|
|
- **ADR-006**: Memory Management
|
|
- **ADR-007**: Security Review & Technical Debt (v2.1 audit findings)
|
|
|
|
---
|
|
|
|
## Compliance and Standards
|
|
|
|
### Performance Standards
|
|
- All Ruvector operations must complete within latency budget
|
|
- Memory pool must never exceed configured budget
|
|
- Witness log writes must be non-blocking
|
|
|
|
### Data Standards
|
|
- All embeddings use consistent 768-D representation
|
|
- Timestamps in UTC with millisecond precision
|
|
- UUIDs for all entity identifiers
|
|
|
|
### Security Considerations
|
|
- Session data may contain user context; encryption at rest required
|
|
- Audit logs must support retention policies for compliance
|
|
- Kernel packs must be signed and verified before loading
|
|
|
|
---
|
|
|
|
## References
|
|
|
|
1. RuvLLM Architecture Documentation: `/examples/ruvLLM/docs/sparc/03-architecture.md`
|
|
2. SONA Overview: `/examples/ruvLLM/docs/SONA/00-OVERVIEW.md`
|
|
3. mistral.rs Paged Attention: https://github.com/EricLBuehler/mistral.rs
|
|
4. vLLM PagedAttention Paper: "Efficient Memory Management for Large Language Model Serving"
|
|
5. Ruvector Core Documentation: https://github.com/ruvnet/ruvector
|
|
|
|
---
|
|
|
|
## Implementation Status (v2.1.1)
|
|
|
|
| Component | Status | Notes |
|
|
|-----------|--------|-------|
|
|
| KV Cache Manager | ✅ Implemented | Two-tier FP16/Q4 with safety fixes |
|
|
| Session Store | ✅ Implemented | SQLite-backed with WASM support |
|
|
| Pattern Memory | ✅ Implemented | HNSW-indexed ReasoningBank |
|
|
| Witness Logs | ⚠️ Partial | Schema defined, async writes pending |
|
|
| Metal Shaders | ✅ Implemented | GEMV kernels with simdgroup reduction (v2.1.1) |
|
|
| Metal GPU GEMV | ✅ Implemented | Auto-offload for 512x512+ matrices, 3x speedup |
|
|
| Accelerate BLAS | ✅ Implemented | AMX coprocessor via cblas_sgemv, 2x speedup |
|
|
| Speculative Decoding | ✅ Implemented | Enabled by default, auto-detect draft models |
|
|
| Token Generation | ❌ Stub | Placeholder returns dummy response |
|
|
| GGUF Loading | ❌ Stub | Parser exists, loading not wired |
|
|
|
|
**Performance Status (v2.1.1):**
|
|
- Target decode speed: 200+ tok/s (beating MLX's ~160 tok/s)
|
|
- Accelerate Framework: 80+ GFLOPS (2x vs pure NEON)
|
|
- Metal GPU: 100+ GFLOPS (3x vs CPU)
|
|
- Speculative Decoding: 2-3x decode speedup
|
|
|
|
**Security Status:** 8 critical vulnerabilities fixed (2026-01-19). See ADR-007 for full audit trail.
|
|
|
|
---
|
|
|
|
## Revision History
|
|
|
|
| Version | Date | Author | Changes |
|
|
|---------|------|--------|---------|
|
|
| 1.0 | 2026-01-18 | Ruvector Architecture Team | Initial version |
|
|
| 1.1 | 2026-01-19 | Security Review Agent | Added implementation status, linked ADR-007 |
|
|
| 1.2 | 2026-01-19 | Performance Optimization Agents | Added v2.1.1 components: Metal GPU GEMV, Accelerate BLAS, Speculative Decoding; added Performance Status section |
|