d803bfe2b1
git-subtree-dir: vendor/ruvector git-subtree-split: b64c21726f2bb37286d9ee36a7869fef60cc6900
47 lines
1.3 KiB
Markdown
47 lines
1.3 KiB
Markdown
# ADR-CE-014: Reflex Lane Default
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**Status**: Accepted
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**Date**: 2026-01-22
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**Parent**: ADR-014 Coherence Engine Architecture
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## Context
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A coherence system that escalates too often becomes:
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- Slow (every operation waits for heavy compute)
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- Noisy (constant human escalations)
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- Ignored (users bypass the system)
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## Decision
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**Reflex lane default - most updates stay low-latency, escalation only on sustained incoherence.**
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Design principles:
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1. **Default to Lane 0**: Most operations complete in <1ms
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2. **Transient spikes tolerated**: Brief energy increases don't escalate
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3. **Persistence triggers escalation**: Only sustained/growing incoherence moves up lanes
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4. **Human lane is last resort**: Lane 3 only when automated systems cannot resolve
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Persistence detection:
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```rust
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fn is_escalation_needed(history: &EnergyHistory, window: Duration) -> bool {
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history.is_above_threshold(threshold, window) ||
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history.is_trending_up(window)
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}
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```
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## Consequences
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### Benefits
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- System stays responsive under normal operation
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- Escalation is meaningful (not noise)
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- Users trust the system (it's not crying wolf)
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### Risks
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- Might miss real problems that appear transient
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- Persistence window requires tuning
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## References
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- ADR-014: Coherence Engine Architecture, Section 3
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- ADR-CE-006: Compute Ladder
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